Computer Science

Colloquium Details

Research Colloquium-Remove the Memory Wall: From performance modeling to architecture optimization

Abstract

Data access is a known bottleneck of high performance computing (HPC). The prime sources of this bottleneck are the performance gap between the processor and memory storage and the large memory requirements of ever-hungry applications. Although advanced memory hierarchies and parallel file systems have been developed in recent years, they only provide high bandwidth for contiguous, well-formed data streams, performing poorly for accessing small, noncontiguous data. Unfortunately, many HPC applications make a large number of requests for small and noncontiguous pieces of data, as do high-level I/O libraries such as HDF-5. The problematic memory wall remains after years of study and, in fact, is becoming the most important issue of HPC. We propose a new I/O architecture for HPC. Unlike traditional I/O designs where data is stored and retrieved by request, our architecture is based on a novel "Server-Push" model in which a data access server proactively pushes data from a file server to the compute node's memory or to it's cache directly based on the architecture design. Simulation results show that with the new approach the cache hit rates increase well above 90% for various benchmark applications that are notorious for poor cache performance.

Biography

Xian-He Sun is a professor of computer science and the director of the Scalable Computing Software laboratory at Illinois Institute of Technology (IIT), a guest faculty in the Mathematics and Computer Science Division at the Argonne National Laboratory, and a visiting scientist of the Fermi National Laboratory. Before joining IIT, he worked at DoE Ames National Laboratory, at ICASE, NASA Langley Research Center, was a professor of the Louisiana State University, Baton Rouge, and was an ASEE fellow at Navy Research Laboratories. Dr. Sun's research interests include parallel and distributed processing, software systems, pervasive computing, and scientific computing. He received the ONR and ASEE Certificate of Recognition award in 1999, the Best Paper Award from the International Conference on Parallel Processing (ICPP01) in 2001, and the Best Poster Award at IEEE International SuperComputing Conference in 2003. An IETF Internet standard (RFC--RFC3910) was released in 2004 based on his novel concept of cross-network service.