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Keywords: regularity, processor arrays, emulation, interconnection networks.
Regular is an often used term to suggest simple and unifrom structure of a parallel processor's organization or a parllel algorithm's operation. However, a strict definitiion is long overdue. In this paper, we define regularity for processor array structures in two dimensions and enumerate the eleven distinct regular topologies. Space and time emulation schemes among the regular processor arrays are constructured to compare their geometric and performance characteristics. The hexagonal array is shown to have the most efficient emulation capabilities.
Created: Tue Jun 22 15:40:37 US/Pacific 2004
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