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Keywords: Characterization, memory systems, multiprocessor, performance
hough architectural improvements in memory organization of multiprocessor systems can increase effective data bandwidth, the actual performance achieved is highly dependent upon the characteristics of the memory address streams; e.g., the data access rate, and the temporal and spatial distributions. Accurately quantify- ing the performance behavior of a multiprocessor memory system across a broad range of algorithmic parameters is crucial if users (and restructuring compilers) are to achieve high-performance codes. In this paper, we demonstrate how the behavior of a cache-based multivector processor memory system can be systematically characterized and its performance experimentally correlated with key features of the ad- dress stream. The approach is based on the definition of a family of parameterized kernels used to explore specific aspects of the memory systemís performance. The empirical results from this kernel suite provide the data from which architectural or algorithmic characteris- tics can be studied. The results of applying the approach to an Alliant FX/S are presented.
Created: Wed Feb 18 11:55:27 2004
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