The family of concurrent logic programming languages based on Flat-Guarded Horn Clauses has proven to be a great asset to programmers seeking to quickly construct efficient programs for highly parallel shared-memory machines. If these languages are to be implemented efficiently for other architectures, however, language-specific compile-time analysis techniques must be improved. This work describes a technique and implementation of automatic "mode analysis" (identification of input and output parameters) for a large subset of FGHC programs, and some possible techniques for the automatic "sequentialization" (ordering of body goals) of a subset of the fully-moded programs.